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Samsung Begins Mass Production of 2nd Generation 10nm LPP Process Node

Samsung's second-generation 10nm node, 10nm LPP, is now ready for mass production, with further performance and power consumption improvements over its older technology, 10nm LPE.
By Joel Hruska
Silicon wafer

Samsung announced it has begun mass production of parts based on its 2nd generation 10nm LPP process node. It's a significant step for the company, which faces competition from TSMC and GlobalFoundries for customers who want cutting-edge semiconductor technology.

As process node progressions and the degree of improvement offered by moving from one node to the next have slowed and shrunk respectively, it's become more common for foundries to split their performance improvements across multiple generations. Samsung's first generation of 10nm, 10nm LPE, offered 27 percent higher performance or 40 percent lower power consumption compared with its 14nm predecessor. The new 10nm LPP process is less of a jump, with a 10 percent performance improvement or a 15 percent power reduction compared with 10nm LPE parts.

“We will be able to better serve our customers through the migration from 10LPE to 10LPP with improved performance and higher initial yield,” said Ryan Lee, vice president of Foundry Marketing at Samsung Electronics. “Samsung with its long-living 10nm process strategy will continue to work on the evolution of 10nm technology down to 8LPP to offer customers distinct competitive advantages for a wide range of applications.”

Samsung10nm Samsung and its rival TSMC are taking somewhat different paths with 10nm. TSMC has stated it views 10nm as a short-lived node, while Samsung plans to keep the technology around for a longer period of time. There's no "right" answer to the question of how to navigate node transitions, particularly given the way node names now lack any objective meaning beyond "Marketing says a new name is better."

TSMC, GlobalFoundries, Samsung, and Intel have different defined feature sizes at the same node, with Intel typically offering smaller features than the pure-play foundries at the same label. TSMC and Samsung's 10nm, for example, is expected to match Intel's 14nm features, while Intel's 10nm should be the equal of 7nm when the three rival foundries deploy it. There's also some uncertainty in long-term roadmaps related to EUV availability and the viability of using triple or quadruple patterning for semiconductor designs; these features allow 193nm ArF lithography to etch features at such tiny scales, but they also drive up mask and therefore SoC costs.

Samsung has also announced its new fab, S3, is ready to ramp up on 10nm production and, in the not-too-distant future, EUV integration as well. The company will also build an 8nm node without EUV, to give itself a migration path forward if EUV integration doesn't go well.

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